Technical Lead - FPGA Verification

Thales India Engineering Competency Center seeks a Hands-on Technical Lead for FPGA IVV. This dual-impact role acts as player and technical coach to elevate team skills while remaining directly involved in execution of complex verification activities. Drive transition to SV-UVM and guarantee DO-254 excellence in aerospace and defense sectors.

Provide daily coaching on SV-UVM best practices and advanced debugging techniques to the engineering team. Conduct code reviews and architecture workshops transitioning from directed testing to coverage-driven verification. Establish and maintain high-quality coding standards for SV-UVM and DO-254 documentation.

Architect and code critical UVM components like BFMs and Scoreboards, plus complex test scenarios. Personally lead verification of high-speed protocols including PCIe, AXI4, ARINC 818/664. Take lead on challenging bottlenecks from simulation mismatches to hardware-software integration issues.

Own end-to-end verification cycle for DAL A/B ensuring 100% traceability between requirements and test results. Hands-on draft and review critical certification documents. Lead technical estimation, planning, and risk mitigation for IVV scope at Bengaluru competence center serving global needs.